[April 2026] WE ARE HIRING

Dolphin Technology Vietnam Center is one of the first and leading companies in Vietnam in the field of integrated circuit design. We specialize in designing semiconductor IP, high-speed SRAM, memory compilers and testers, input/output logic interfaces, and peripheral interface controllers (such as DDRx SDRAM, USB, PCIe, etc.). We have two offices located in Hanoi and Hai Phong

We are currently recruiting for the following position:

1. STANDARD CELL TECHNICAL LEAD  – SL: 1 person

Job Description:

• Lead design and development of standard cell libraries across multiple nodes 
• Define architecture and methodology for library development 
• Drive PPA optimization and scalability for advanced nodes
• Review schematic, layout, and characterization results
• Mentor engineers and guide technical direction
• Coordinate with cross-functional teams (PD, RTL, EDA)
• Ensure delivery quality, silicon readiness, and schedule

Requirements

• 7+ years experience in IC design, focusing on standard cells 
• Strong leadership or technical ownership experience 
• Deep understanding of CMOS design, timing, and power optimization 
• Expertise in characterization flows and Liberty modeling 
• Strong experience with Cadence and Synopsys toolchains 
• Fluent / near-native English communication is REQUIRED:
  • Able to lead technical discussions, design reviews, and customer meetings in English
  • Confident in presenting complex technical topics clearly 
  • Direct collaboration with international customers and cross-site teams on a daily basis 

Advanced Node Expertise (Required)

• Hands-on or strong experience with advanced nodes (≤7nm, FinFET)  
• Solid understanding of 2nm-class technologies (GAA / nanosheet transistors)  
• Experience handling advanced node challenges:   
  • Variability, IR drop, EM, signal integrity 
  • Layout-dependent effects (LDE), double patterning / EUV constraints 
  • Power density and thermal considerations
• Ability to define design methodology for next-gen nodes (2nm and beyond) 

Preferred

• Experience with library development for FinFET / GAA nodes 
• Automation and flow development (Python, Tcl, Shell)  
• Experience working with foundry partners (TSMC) 

Benefits 

• Leadership role in cutting-edge semiconductor projects
• Competitive compensation package 
• Opportunity to define next-generation library architecture 
• Collaboration with global teams and advanced silicon programs 

2. STANDARD CELL DESIGN ENGINEER  – SL: 2 people

Job Description:

• Design and optimize standard cell libraries (combinational & sequential cells) 
• Perform schematic design and layout verification (DRC/LVS) 
• Characterize standard cells across PVT corners
• Generate and validate Liberty (.lib) files for timing and power 
• Collaborate with physical design and front-end teams
• Optimize PPA (Power, Performance, Area)

Requirements

• 3–5 years of experience in IC design / standard cell development 
• Strong understanding of CMOS digital design fundamentals  
• Strong Hands-on experience with SPICE sim
• Experience with Liberty characterization and timing analysis
• Understanding of PVT corners, timing arcs, setup/hold analysis 
• Fluent English communication is REQUIRED:
  • Able to participate actively in technical discussions and meetings 
  • Comfortable explaining design concepts and issues in English  
  • Able to read/write technical documents and communicate with global team daily

Advanced Node Expertise (Required):

• Hands-on or strong experience with advanced nodes (≤7nm, FinFET) 
• Solid understanding of 2nm-class technologies (GAA / nanosheet transistors)  
• Awareness of challenges in advanced nodes:
  • Variability, leakage, parasitics, IR drop, EM, signal integrity
  • Layout-dependent effects (LDE) 
  • Experience working with foundry PDKs 

Preferred:

• Knowledge of low-power techniques (multi-Vt, multi-Vdd)
• Scripting (Python, Tcl)
• Experience working with foundry PDKs 

Benefits:

• Competitive salary & performance bonus 
• Opportunity to work on advanced semiconductor technologies
• International working environment
• Career growth in ASIC/EDA domain 

GENERAL BENEFITS:

• Attractive negotiable starting salary, commensurate with qualifications and experience. Salary review after 6 months and annual increases.
• Bonuses for holidays and Tet, quarterly bonuses, 13th-month salary, performance-based bonuses, and project bonuses.
• Opportunity to participate in diverse projects, develop and apply the latest technologies.
• Opportunity to work with and be trained by leading experts in the IC (Integrated Circuit) field.
• Friendly, youthful, dynamic, and creative working environment.
• Full insurance benefits (Social Insurance, Health Insurance, Unemployment Insurance) in accordance with government regulations.
• Annual leave, public holidays, and Tet holidays in accordance with government regulations.
• Working days: Monday to Friday; off on Saturdays and Sundays.
• Annual company trips, vacations, team-building activities, football, sports, and company events.
• Periodic health check-ups as per company policy.
• Working location: Hanoi.
• Application deadline: April 25, 2026

APPLICATION DOCUMENTS:

• CV with photo (required), clearly stating experience and research/work projects (if any). CV in English is preferred.
• Academic transcript. Can be downloaded from the university website; an officially certified version can be submitted later for verification if required by the company.
• Other certificates and qualifications (if any).
• Applications are accepted only via email: jobs@dolphin-vc.com
• Email subject format: Position Applied_Full Name

CONTACT INFORMATION:

Dolphin Technology Vietnam Center Co., Ltd.
2nd Floor – LiLama Building – No. 124 Minh Khai – Bach Mai – Hanoi
Tel: 0243.624.9784
Email: jobs@dolphin-vc.com
Fanpage: https://www.facebook.com/dolphin.jobs
LinkedIn: https://www.linkedin.com/company/dolphin-technology-vietnam-center