Dolphin Technology maintains a broad portfolio of SoC building blocks that provide silicon proven IP for customers who need:
|DDR PHY & Controller|
|EMMC PHY & Controller|
|SD-SDIO PHY & Controller|
|I2C PHY & Controller|
|I2S PHY & Controller|
Dolphin’s extensive offerings have met the most rigorous standards of the industry’s most demanding companies.
Features include slew rate control, per-bit de-skew, gate training, read and write leveling and built-in self test (BIST).
We also provide a complete DDR Memory Controller solution. Read More
Dolphin Technology offers a high performance DDRx/LPDDRx DRAM memory controller solution that is optimized to provide a complete solution along with our DDR PHY IP.
Our controllers are DFI 4.0 compliant and are fully configurable, ensuring maximum performance across different system environments. Read More
Dolphin Technology delivers custom, synthesizable IP to support specific design requirements. The DTI EMMC controller provides the logic to integrate a Host and PHY controller supporting embedded MultiMediaCard (eMMC) version 5.1 into any system on chip (SoC). Read More
DTI SD host controller facilitates host equipment to communicate with SD card. It supports both legacy and ultra-high speed II (UHS-II) interfaces. Read More
DTI I2C controller provides the logic consistent with NXP I2C specification to support the communication of low-speed integrated circuits through I2C bus.
The IP facilitates software controllable by application processor through industry-standard AMBA interface. The bus interface is flexible and easily integrated into APB, AHB or AXI system bus. Read More
DTI I2S controller provides interface between system bus and Inter-IC Sound devices. The controller is compliant with Philips Inter-IC Sound Bus Specification and AMBA APB Specification. Other buses such as AXI-Lite, AHB-Lite, OCP, and etc are optional supports. Read More
DTI_DMA control the DMA transfers data between different points in the memory space without intervention of the CPU. The DMA is generally used to replace two CPU functions: memory copy and transfer data between memory and peripheral (peripheral devices such as SPI, UART, GPIO, I2C, I2S, WDT, etc.) Read More