• AMBA, Advanced Peripheral Bus (APB) Specification Version 2.0
• AMBA, Advanced High-performance Bus (AHB) Specification Version 2.0
• AMBA, Advanced eXtensibale Bus (AXI) Specification Version 4.0
• AMBA, Advanced eXtensibale Lite Bus (AXI-Lite) Specification Version 4.0

DTI SPI Controller supports:

• Programmable operation mode: master or slave
• Programmable data length (8, 16, 24, 32 bits)
• Programmable Clock polarity and phase (CPOL and CPHA)
• Programmable Data Direction (LSB first or MSB first)
• Use separated Async. FIFO for Transmitting and Receiving Data, with programmable user-specified runtime-changeable levels
• Programmable to use FIFO interrupt
• Programmable Clock Divider
• Support Multiple Slaves
• Support Delay between Slave Select and Serial Clock, Delay between 2 bytes in a transfer
• Clock synchronization

Data Sheets are available under NDA

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